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- W2895836541 abstract "This paper covers the automation done to upgrade the reduction of violations which occurs during the Reliability Verification flow by considering each branch or loop resistors and calculating the current through each resistor. It is also estimated that number of straps required particularly for via3 and via4 violations so that to reduce number of RV flow execution. Reliability Verification is carried out in the backend circuit design of microchips. Automation is very essential in improving the efficiency of design and manufacturing stages of a VLSI product. In the present market scenario, the success of a product depends on time to market and hence high level of automation is critical for remaining competitive in the present condition. This paper gives a flow, which enhances the efficiency of effective resistance. This automation significantly reduces the timing efforts to reduce resistance, thereby reducing the back end design time." @default.
- W2895836541 created "2018-10-26" @default.
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- W2895836541 date "2017-12-01" @default.
- W2895836541 modified "2023-09-26" @default.
- W2895836541 title "Effective Resistance Calculation for Fixing Reliability Verification Violations" @default.
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- W2895836541 doi "https://doi.org/10.1109/indicon.2017.8487976" @default.
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