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- W2897028062 abstract "This paper presents the impact of strain on the electrical characteristic such as drain current, threshold voltage, and subthreshold swing (SS) of double-gate tunnel FETs (DG TFETs) with a SiO <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> /High- k stacked gate-oxide structure. The results obtained from simulation are discussed using energy band diagram, tunneling barrier width, and compared with conventional DG TFETs structure. From the simulation results, it is clear that application of strain on DG TFETs with stacked gate structure shows higher ION/IOFF, lower subthreshold swing (SS) and minimum VT as compare to conventional DG TFETs structure. All the simulation are done in ATLAS 2-D device simulator from SILVACO for channel length of 60 nm using nonlocal band-to-band tunneling model and application of strain in the channel region." @default.
- W2897028062 created "2018-10-26" @default.
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- W2897028062 date "2017-12-01" @default.
- W2897028062 modified "2023-10-16" @default.
- W2897028062 title "Impact of Strain on Electrical Characteristic of Double-Gate TFETs with a SiO<inf>2</inf>/RfO<inf>2</inf>Stacked Gate-Oxide Structure" @default.
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- W2897028062 doi "https://doi.org/10.1109/indicon.2017.8487500" @default.
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