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- W2897675141 abstract "Data compression is a common requirement for displaying large amounts of information. The goal is to reduce visual clutter. The approach given in this paper uses an analysis of a data set to construct a visual representation. The visualization is compressed using the address ranges of the memory structure. This method produces a compressed version of the initial visualization, retaining the same information as the original. The presented method has been implemented as a Memory Designer tool for ASIC, FPGA and embedded systems using IP-XACT. The Memory Designer is a user-friendly tool for model based embedded system design, providing access and adjustment of the memory layout from a single view, complementing the programmer's view to the system." @default.
- W2897675141 created "2018-10-26" @default.
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- W2897675141 date "2018-08-01" @default.
- W2897675141 modified "2023-10-16" @default.
- W2897675141 title "Visualization of Memory Map Information in Embedded System Design" @default.
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- W2897675141 doi "https://doi.org/10.1109/dsd.2018.00040" @default.
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