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- W2899460912 abstract "Power and energy efficiency poses a prime constraint on IoT SoCs. Dynamic voltage and frequency scaling (DVFS) - in combination with adaptive voltage scaling (AVS) - can trade performance for power matching the workload. However, classic timing closure leads to substantial power variations across process and temperature, especially from SS/Cold to FF/Hot due to leakage. This paper presents an ARM Cortex-M3 based MCU with integrated voltage regulator featuring AVS, which achieves for the CPU incl. 8kB SRAM 34nW static power, 15.3pJ/instruction active energy and 16% power variations across process and temperature (-40-120°C) corners measured in silicon. The digital subsystem employs a new replica scheme combining replica circuits and in-situ monitors to track critical paths under the inter/intra-die variations. Mandating AVS, we show a novel methodology for logic synthesis with optimal usage percentage per $V^{mathrm{th}}$ level, at which point the power consumption is balanced and minimized across process and temperature." @default.
- W2899460912 created "2018-11-09" @default.
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- W2899460912 date "2018-09-01" @default.
- W2899460912 modified "2023-09-26" @default.
- W2899460912 title "A Cortex-M3 Based MCU Featuring AVS with 34nW Static Power, 15.3pJ/inst. Active Energy, and 16% Power Variation Across Process and Temperature" @default.
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- W2899460912 doi "https://doi.org/10.1109/esscirc.2018.8494312" @default.
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