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- W2900651532 abstract "In this paper, it introduces the design and implementation of custom IP core for liquid crystal display (LCD) controller based on system on a programmable chip (SOPC) technology and Verilog hardware description language (HDL). The IP core can be put up as a general-purpose peripheral module to the Avalon Bus, communicating with the NIOS II through registers, and the underlying sequential logic for communicating with the external LCD liquid crystal module is automatically completed by the module. The driver does not need to care about the details of the underlying timing, it only needs to implement the read and write operations of the LCD data through register access, thus achieve the purpose of controlling the display content of the LCD. In addition to reducing the complexity of driver development, the design can also take full advantage of the parallel operation of hardware logic to improve the execution efficiency of the entire system and the throughput of processing tasks, especially in some occasions where high-speed image real-time processing is required. Simulations and experiments show that the IP core for LCD controller has good stability, versatility and compatibility." @default.
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- W2900651532 date "2018-01-01" @default.
- W2900651532 modified "2023-10-18" @default.
- W2900651532 title "The Design of IP Core for LCD Controller Based on SOPC" @default.
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- W2900651532 doi "https://doi.org/10.1051/matecconf/201823204074" @default.
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