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- W2900897993 abstract "In this paper, a 3.5-GHz class-F Power Amplifier with current-reused topology in 0.13-[Formula: see text]m CMOS for 5G application is presented. This proposed circuit has a two-stage structure by a current-reused topology driving to improve gain and the stability of PA. An output matching network is constructed by an open-circuited third harmonic resonator that can integrate the current and voltage waveform in the time domain adopted to improve the output power and reduce power consumption. The simulation results show that the proposed PA provides a 13[Formula: see text]dBm output power with a PAE of 50.5% and a small signal gain of 32.5[Formula: see text]dB that is higher than reported for a two-stage design in CMOS at the 3.5-GHz frequency, while the minimum output return loss ([Formula: see text]) is [Formula: see text]14.4[Formula: see text]dB with a minimum value of [Formula: see text]24.67[Formula: see text]dB. Many experiments are carried out to prove that the proposed PA has higher gain and higher efficiency compared to the traditional class-F power amplifier and is suitable for 5G short-range applications. Finally, the layout occupies a compact chip area of [Formula: see text][Formula: see text]mm 2 , including testing pads." @default.
- W2900897993 created "2018-11-29" @default.
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- W2900897993 date "2019-10-01" @default.
- W2900897993 modified "2023-10-16" @default.
- W2900897993 title "A 3.5-GHz Class-F Power Amplifier with Current-Reused Topology in 0.13-μm CMOS for 5G Application" @default.
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- W2900897993 doi "https://doi.org/10.1142/s0218126619501937" @default.
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