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• W2902092599 abstract "Vector matrix multiplication computation underlies major applications in machine vision, deep learning and scientific simulation. These applications require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet this increasing demand. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. One such primitive is a memristor-CMOS crossbar array based vector matrix multiplication. In this paper, we develop a memristor-CMOS analog co-processor architecture that can handle floating point computation. The crossbar array is based on a $mathbf{TaO}_{mathbf{x}}$ memristor device. To demonstrate the working of the analog co-processor at a system level, we use a new tool developed by Cadence and Mathworks called PSpice Systems Option which performs integrated co-simulation of MATLAB/Simulink and PSpice. It is shown that the analog co-processor has a superior performance when compared to other processors. Using the new PSpice Systems Option tool, various application simulations for image processing and solution to partial differential equations are performed on the analog coprocessor model." @default.
• W2902092599 created "2018-12-11" @default.
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• W2902092599 date "2018-03-01" @default.
• W2902092599 modified "2023-09-22" @default.
• W2902092599 title "Memristor-CMOS Analog Co-Processor for Acceleration of High Performance Computing Applications" @default.
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• W2902092599 doi "https://doi.org/10.1109/icctct.2018.8551115" @default.
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