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• W2912031278 abstract "Silicon two‐layer (TL) nanowire (NW) field‐effect transistors (FETs) are fabricated by applying a CMOS‐compatible top‐down approach to silicon on insulator (SOI) wafers with additionally epitaxially grown silicon layers. Transport and noise properties of fabricated structures with p‐type conductivity are studied in a wide temperature range (100–300 K). A random telegraph signal (RTS) noise as a special case of trapping‐detrapping processes is registered as a dominant noise component at room temperature. A shift of the characteristic corner (rollover) frequency of the RTS noise to lower frequencies with temperature decreasing is observed. By performing analysis of temperature‐dependent low‐frequency noise, the activation energy and hole capture cross section of a single trap responsible for the RTS noise are estimated to be (0.29 ± 0.02 eV) and (2.22 ± 0.15) ×10 −18 cm 2 , respectively. Obtained values suggest that the trap can be attributed to a vacancy‐boron complex. At the temperature below 200 K fabricated devices demonstrate a clear generation‐recombination noise with power spectral density proportional to 1/ f 3/2 . Such noise behavior provides the evidence of diffusion‐assisted processes in two‐layer nanowire structures. This confirms the contribution of high‐doped top silicon layer to the transistor transport properties." @default.
• W2912031278 created "2019-02-21" @default.
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• W2912031278 date "2019-01-30" @default.
• W2912031278 modified "2023-10-16" @default.
• W2912031278 title "Temperature‐Dependent Noise and Transport in Silicon Two‐Layer Nanowire FETs" @default.
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• W2912031278 doi "https://doi.org/10.1002/pssb.201800636" @default.
• W2912031278 hasPublicationYear "2019" @default.
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