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- W2912893816 abstract "In this paper, we present a methodology for designing the main circuit building blocks of an electrical impedance tomography (EIT) system. In particular, we derive equations that map system-level EIT specifications to the performance requirements of each circuit block. We also review the circuit architectures that are best suited for meeting a given set of performance requirements. Our proposed design methodology is focused on maximizing the EIT system's signal-to-noise ratio while minimizing total power consumption." @default.
- W2912893816 created "2019-02-21" @default.
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- W2912893816 date "2019-04-01" @default.
- W2912893816 modified "2023-10-18" @default.
- W2912893816 title "Structured Design Methodology to Achieve a High SNR Electrical Impedance Tomography" @default.
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- W2912893816 doi "https://doi.org/10.1109/tbcas.2019.2894157" @default.
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