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• W2912995269 abstract "For the first time, ultra-low power ferroelectric FinFET-based monolithic 3D <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>+</sup> -IC technology was demonstrated for near memory computing (NMC) circuit. Key enablers are ICP-SiO <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> interfacial layer, doped hafnia ferroelectric gate dielectric layer (HfZrO <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> ), and far-infrared laser activation. The proposed stackable 3D NC-FinFETs thus fabricated exhibit record-low sub-threshold swing (NC-nFinFET: 45mV/dec and NC-pFinFET: 50mV/dec) and high I <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>on</sub> /I <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>off</sub> (>10 <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>6</sup> ) that enable ultra-low power operation (VDD=100mV) of CMOS inverter and SRAM. Moreover, above mentioned features of NC-FinFETs and the differential output of SRAM readout enable 50+% area reduction in the near-memory computing circuitry." @default.
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• W2912995269 date "2018-12-01" @default.
• W2912995269 modified "2023-10-18" @default.
• W2912995269 title "Ultra-Low Power 3D NC-FinFET-based Monolithic 3D+ -IC with Computing-in-Memory for Intelligent IoT Devices" @default.
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• W2912995269 doi "https://doi.org/10.1109/iedm.2018.8614697" @default.
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