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• W2913178838 abstract "Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising alternative technology for on-chip memories due to several advantages such as high density, non-volatility, scalability, high endurance and CMOS compatibility. Due to the emerging fabrication processes of magnetic layers in the fabrication of STTMRAM devices, they are more susceptible to manufacturing defects and have different failure mechanisms compared to conventional CMOS memories. This mandates specific fault modeling and development of proper test algorithms for high coverage testing of these memories in order to ensure correct functionality in the field. In this paper, a detailed defect injection is performed based on the magnetic devices and layout characteristics of STT-MRAM and unique fault models are constructed for these memories. Based on the derived fault models and behaviors, efficient test algorithms are developed to fully cover these faults." @default.
• W2913178838 created "2019-02-21" @default.
• W2913178838 creator A5041707514 @default.
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• W2913178838 date "2018-10-01" @default.
• W2913178838 modified "2023-09-26" @default.
• W2913178838 title "Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM" @default.
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• W2913178838 doi "https://doi.org/10.1109/test.2018.8624725" @default.
• W2913178838 hasPublicationYear "2018" @default.
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