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- W2913946665 abstract "This paper presents a methodology for a reconfigurable SRAM architecture for multimedia applications that allows dynamic power-quality trade-off at run time. To improve the noise margin during SRAM read and write modes at low voltages and also reduce the leakage current in retention mode, the proposed SRAM uses three supply voltages. Simulation results show a 69% power saving and a 263% improvement in image quality with the proposed SRAM compared to a single-supply SRAM at 0.70 V and 20 MHz for a 64 kb array in 32 nm CMOS technology." @default.
- W2913946665 created "2019-02-21" @default.
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- W2913946665 date "2018-09-01" @default.
- W2913946665 modified "2023-10-14" @default.
- W2913946665 title "A Methodology for Low-Power Approximate Embedded SRAM Within Multimedia Applications" @default.
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- W2913946665 doi "https://doi.org/10.1109/socc.2018.8618492" @default.
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