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- W2913978472 abstract "This paper presents a novel Connected Component Analysis hardware architecture suitable for high-performance heterogeneous image processing embedded systems. The target application referenced along the work is the Automated Traffic Sign Recognition for next generation Advanced Driver-Assistance Systems. In such a field, a high throughput rate is mandatory to obey high-speed camera input frame rate. The proposed architecture executes a complete Connected Component Analysis by just one scan of the input image; therefore, it reaches performances higher than several existing hardware designs. When implemented on a Xilinx Zynq Z7045 SoC, our design allows a throughput rate of 212 Mpixels/s to be reached using 18144 LUTs and 5005 FFs, which correspond to less than 9% and 1.5% of the available resources." @default.
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- W2913978472 date "2018-12-01" @default.
- W2913978472 modified "2023-09-26" @default.
- W2913978472 title "Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems" @default.
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- W2913978472 doi "https://doi.org/10.1109/icecs.2018.8618035" @default.
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