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• W2914017703 abstract "Among various reasons, reduction of harmonic content is the major reason for which multilevel inverters has been chosen over the classical two-level converter The current rating or the voltage rating of the multilevel inverter becomes a compound of specific switches and thus the power rating of the inverter can surpass the limit executed by the individual switches. Thus, in order to increase the voltage levels with the lesser number of components, a reduced switch topology is developed and is tested in MATLAB/Simulink environment.A single phase N-level inverter is proposed in this paper for both the symmetric and asymmetric voltage source distribution. In addition, prototype model of 9-level symmetrical inverter and 21-level asymmetrical inverter is developed in MATLAB. Nevertheless, the topology is further compared with other existed reduced switches topology and found to be better in terms of complexity, economic cost and maintenance." @default.
• W2914017703 created "2019-02-21" @default.
• W2914017703 creator A5007054388 @default.
• W2914017703 creator A5041200766 @default.
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• W2914017703 date "2018-03-01" @default.
• W2914017703 modified "2023-09-24" @default.
• W2914017703 title "N-Level Cascade Multilevel Converter with optimum number of switches" @default.
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• W2914017703 doi "https://doi.org/10.1109/rtecc.2018.8625638" @default.
• W2914017703 hasPublicationYear "2018" @default.
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