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• W2916239311 abstract "Previous work on Dual Mode Logic (DML) have demonstrated improvements in frequency and energy compared to CMOS. In this paper, for the first time, we examine scaling of the DML circuits and present an evaluation of DML in 28nm bulk technology. The impact of intrinsic capacitance, logic depth and robustness are analyzed for a wide power supply range. For this purpose, two benchmarks were implemented and compared to CMOS. Results show up to 22% better performance in terms of speed and up to 24% in terms of energy when the circuit operates in the dynamic and static mode, respectively." @default.
• W2916239311 created "2019-03-02" @default.
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• W2916239311 date "2018-12-01" @default.
• W2916239311 modified "2023-09-27" @default.
• W2916239311 title "Efficiency of Dual Mode Logic in Nanoscale Technology Nodes" @default.
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• W2916239311 doi "https://doi.org/10.1109/icsee.2018.8646267" @default.
• W2916239311 hasPublicationYear "2018" @default.
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