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• W2918445173 abstract "UM-BUS, a reconfigurable high-speed device interconnected bus, has been proposed to enable lightweight sensor system deployment in IoTs. Performance prediction is a key step to build an idea of the worst or best cases before real world deployment of UM-BUS-based systems. This paper proposes a queuing theory guided analytic model which allows us to obtain an approximation for the average packet delay as well as upper and lower bounds. Furthermore, a Revive Interval (RI)-based technique is proposed to establish a dynamic logical cycle frame to involve only active nodes so as to improve the bus efficiency. A set of experiments based on MATLAB simulation are conducted to evaluate the bus performance. The proposed dynamic cycle frame scheme is validated to be effective for a high performance and low power design." @default.
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• W2918445173 date "2019-06-01" @default.
• W2918445173 modified "2023-10-15" @default.
• W2918445173 title "Queuing theory guided performance evaluation and energy optimization for a reconfigurable high speed device interconnected bus" @default.
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• W2918445173 doi "https://doi.org/10.1016/j.suscom.2019.02.004" @default.
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