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- W2949777326 abstract "This brief presents a fully integrated dc offset cancellation (DCOC) scheme with configurable cut-off frequency and settling time. The proposed digitally assisted real-time DCOC scheme prevents the high gain baseband circuitry from saturation in direct conversion receivers. The proposed DCOC is designed and implemented in a $0.18~mu text{m}$ CMOS process. It occupies an area of 0.042 mm2 and consumes a current of 0.58 mA for I and Q paths under 1.8 V supply. The residual output dc offset voltage (DCOV) is less than 5 mV under the maximum baseband gain of 62 dB. The 3-dB high-pass cut-off frequency can be configured from 100 Hz to 1 kHz and settling time varying from 5.7 ms to 0.7 ms when the receiver operates under the maximum baseband gain." @default.
- W2949777326 created "2019-06-27" @default.
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- W2949777326 date "2019-10-01" @default.
- W2949777326 modified "2023-09-22" @default.
- W2949777326 title "Fully Configurable Capacitor-Less Oversampling DC Offset Cancellation for Direct Conversion Receivers" @default.
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- W2949777326 doi "https://doi.org/10.1109/tcsii.2019.2921895" @default.
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