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• W2999903360 abstract "Drain-source voltage-sensed synchronous rectification (SR) is a technique that can be used to reduce the secondary-side diode conduction loss of an LLC converter. In drain-source SR, an early SR-switch turn off issue is observed due to parasitics present in the path of the SR drain-source sensing loop. In rectifiers with parallel switches which is common in higher current applications, a new sequential turn-off method named “sequential parallel switching” (SPS) is proposed to extend the SR conduction period. By increasing the drain-source voltage signal near the turn-off moment, the effect of the parasitic inductance on the SR signal can be minimized, extending the total SR conduction time. This results in a net increase in total converter efficiency, despite a small increase in the SR switch channel conduction. A SPS-based rectifier is built with an FPGA based on a commercial SR controller and tested on a 300-V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>in</sub> , 1-kW LLC converter." @default.
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• W2999903360 date "2020-11-01" @default.
• W2999903360 modified "2023-10-18" @default.
• W2999903360 title "Sequential Parallel Switching for Drain-Source Synchronous Rectification Efficiency Boost in Parallel Switch Rectifiers" @default.
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• W2999903360 doi "https://doi.org/10.1109/tcsii.2020.2964166" @default.
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