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- W3009132911 abstract "A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using a multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area." @default.
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- W3009132911 date "1987-11-15" @default.
- W3009132911 modified "2023-10-03" @default.
- W3009132911 title "On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays" @default.
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