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- W3013100971 abstract "This presents a novel fractional local oscillator (LO) divider with an area-efficient calibration scheme to mitigate oscillator pulling effects in transmitter (TX) by offsetting the LO and TX operating frequency. The multi-modulus division ratio is achieved by combining multiphase divide-by-N signals from N-stage ring counters. However, the delay mismatches due to layout or device mismatches among multiphase signal paths result in fractional spurs. By introducing the successive approximation detection (SAD) calibration scheme, the divider achieves real-time division ratio variance inexpensively without deteriorating the LO performance. A prototype is verified in the 65 nm CMOS process. Simulation results show that the entire system can provide LO signals for 4G/5G wireless communication systems. After calibration, fractional spurs are reduced from -37.67dBc to -57.93dBc at a typical output frequency of 2GHz." @default.
- W3013100971 created "2020-04-03" @default.
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- W3013100971 date "2020-12-01" @default.
- W3013100971 modified "2023-09-24" @default.
- W3013100971 title "A Multi-Modulus Fractional Divider With TDC Free Calibration Scheme for Mitigation of TX-VCO Pulling" @default.
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- W3013100971 doi "https://doi.org/10.1109/tcsii.2020.2983785" @default.
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