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- W3023163613 abstract "One of the major challenges facing hardware designers in the 21st century is the problem of hardware–software co-design. This has moved on from a basic partitioning mechanism based on standard hardware architectures to the current situation, where the algorithm itself can be optimized at a compilation level for performance or power by implementing appropriately at different levels with the required hardware or software. This chapter focuses on the key topic of Integrating Processors onto Field Programmable Gate Array (FPGA) designs. This ranges from simple 8-bit microprocessors up to large IP processor cores that require an element of hardware–software co-design involved. This chapter examines the basics of implementing a behavioral-based microprocessor for evaluation of algorithms and the practicalities of structurally correct models that can be synthesized and implemented on an FPGA." @default.
- W3023163613 created "2020-05-13" @default.
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- W3023163613 date "2008-01-01" @default.
- W3023163613 modified "2023-09-23" @default.
- W3023163613 title "Embedded Processors" @default.
- W3023163613 doi "https://doi.org/10.1016/b978-075068625-9.50016-6" @default.
- W3023163613 hasPublicationYear "2008" @default.
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