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- W3033630149 abstract "RGB to gray conversion is an integral part of various computer vision applications such as face detection, object detection and surveillance systems. The resource required for the real time implementation of all these applications decreases to a great extent if computation is performed on gray images, which has 8 bit wide pixel, rather than color images, which has 24 bit wide pixel. In this paper, hardware efficient implementation of RGB to gray image is proposed which is realized on both FPGA and ASIC. FPGA realization is performed on digilent Zedboard having Artix-7 FPGA while the ASIC implementation is performed using Cadence Genus and Innovus tool at 45 nm process technology. ASIC implementation of proposed technique brings about total area utilization of 262 um2 and ADP of 18.078 um2 *ns which are respectively 81.42% and 96.55% less contrasted with existing design. The proposed system is seen to operate at high frequency of 3 GHz." @default.
- W3033630149 created "2020-06-12" @default.
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- W3033630149 date "2020-01-01" @default.
- W3033630149 modified "2023-10-16" @default.
- W3033630149 title "Efficient Hardware of RGB to Gray Conversion Realized on FPGA and ASIC" @default.
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- W3033630149 doi "https://doi.org/10.1016/j.procs.2020.04.215" @default.
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