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- W3039211648 abstract "This paper analyzes degradation of transient performance of on-chip voltage regulators, namely, a digital low dropout regulator (DLDO) and an integrated inductive voltage regulator (IVR), due to negative-bias-temperature-instability (NBTI) induced aging degradations. Improvement of transient response for the aged systems using post silicon tuning is also explored. The measurement results from 130nm and 65nm CMOS test-chips demonstrate that an IVR exhibits a higher tolerance to power stage aging compared to DLDO. Furthermore, the measurement results indicate upto 25% improvement in response time for aging induced degradations using an auto-tuning algorithm." @default.
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- W3039211648 date "2020-04-01" @default.
- W3039211648 modified "2023-10-17" @default.
- W3039211648 title "Aging Challenges in On-chip Voltage Regulator Design" @default.
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- W3039211648 doi "https://doi.org/10.1109/irps45951.2020.9128339" @default.
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