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- W3039403794 abstract "A logic-compatible embedded NAND (eNAND) flash memory based synapse with 3 bit per cell weight storage and 1μA current steps was demonstrated in a standard 65nm CMOS process. The eNAND flash based neuromorphic core consists of 16stack eNAND strings. Each flash cell is composed of 3 transistors (2 PMOS and 1 NMOS) and each string is connected to the main bitline via 2 additional NMOS access transistors. In this work, we realized 3 bit weight based on 1μA current steps using the proposed back-pattern tolerant program-verify scheme. To evaluate the reliability of eNAND Flash based synapses, we measured the temperature dependence, read disturbance, and retention characteristics from a 65nm test chip with 3 bit per cell weight storage and 1μA current steps." @default.
- W3039403794 created "2020-07-10" @default.
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- W3039403794 date "2020-04-01" @default.
- W3039403794 modified "2023-09-29" @default.
- W3039403794 title "Reliability Characterization of Logic-Compatible NAND Flash Memory based Synapses with 3-bit per Cell Weights and 1μA Current Steps" @default.
- W3039403794 cites W2290939274 @default.
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- W3039403794 doi "https://doi.org/10.1109/irps45951.2020.9129148" @default.
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