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- W3040598919 abstract "In this work, a capacitorless one-transistor embedded dynamic random-access memory based on a metal-oxide-semiconductor field-effect transistor with a double-polysilicon layer structure has been proposed and investigated using technology computer-aided design simulation. By using the grain boundary for hole storage, a higher sensing margin of 4.35 /μA / /μm is achieved compared to that without using the grain boundary. Furthermore, the proposed device achieves a superior retention time of 555.77 /μs, which is reasonable from the viewpoint of its application in embedded systems (>100 /μs), even at a high temperature of 358 K. For higher device reliability, the effect of the grain boundary on the capacitorless one-transistor embedded dynamic random-access memory is analyzed with different trap distributions. The proposed capacitorless one-transistor embedded dynamic random-access memory cell exhibited superior reliability in terms of retention time (>100 /μs)." @default.
- W3040598919 created "2020-07-10" @default.
- W3040598919 creator A5009572787 @default.
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- W3040598919 date "2020-11-01" @default.
- W3040598919 modified "2023-09-24" @default.
- W3040598919 title "Design and Analysis of Metal-Oxide-Semiconductor Field-Effect Transistor-Based Capacitorless One-Transistor Embedded Dynamic Random-Access Memory with Double-Polysilicon Layer Using Grain Boundary for Hole Storage" @default.
- W3040598919 doi "https://doi.org/10.1166/jnn.2020.18767" @default.
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