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- W3048804034 abstract "In this paper we are going to modify the Schmitt Trigger based SRAM for the purpose of more reduced power & area than the existing type of designs as well as the new design which is combined of virtual grounding with read Error Reduction Logic is compared with the existing technologies & the nanometer technology is also improved for the purpose of much improved reduction of area & power factors than the Schmitt Trigger based SRAM Designs the simulations were done using microwind & DSCH results." @default.
- W3048804034 created "2020-08-18" @default.
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- W3048804034 date "2014-10-01" @default.
- W3048804034 modified "2023-09-30" @default.
- W3048804034 title "A NEW LOW POWER TECHNOLOGY FOR POWER REDUCTION IN SRAM’S USING READ STABILITY WITH REDUCED TRANSISTOR COUNT FOR FUTURE CACHES" @default.
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- W3048804034 doi "https://doi.org/10.47893/ijess.2014.1200" @default.
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