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- W3088971350 abstract "The present work is a novel structure of Junctionless field effect transistor obtained by splitting the gate into two parts parallelly. The structure is termed as parallel gated structure. A simulation study on Cogenda VisualTCAD 2-D 1.8.2 device simulator is done to compare the electrical performance of the parallel gated structure with the conventional structure of Junctionless field effect transistor. A double gate structure has been considered for both proposed and conventional structure for this study. In case of the proposed structure there are total four sections of gate while in conventional structure there are two gates. While simulating identical gate potential is applied in all the gate sections of both of the structures. All the potentials considered for simulation are with reference to source potential. The simulation study shows that the parallel gated structure exhibits lower Drain Induced Barrier Lowering, better subthreshold characteristics, better carrier mobility and reduced leakage current compared to the conventional structure." @default.
- W3088971350 created "2020-10-01" @default.
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- W3088971350 date "2020-07-01" @default.
- W3088971350 modified "2023-09-30" @default.
- W3088971350 title "Parallel Gated Junctionless Field Effect Transistor" @default.
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- W3088971350 doi "https://doi.org/10.1109/compe49325.2020.9200029" @default.
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