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• W3091858780 abstract "In low power designs, timing-speculative techniques are proposed to boost the SRAM frequency and throughput. This paper proposes TYMER, a unified yield-based performance model for timing-speculative SRAM. In TYMER, the first sub-model evaluates access-time yield at different worldline enable time for a general 6T SRAM under low supply voltages, while the second one uses the yield results to estimate optimal sensing time and the overall read latency for speculative SRAM. TYMER is not only compared with simulation results but also the measurements from 28nm fabricated speculative SRAM chips. Both cases show precise evaluation results under different operating conditions." @default.
• W3091858780 created "2020-10-15" @default.
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• W3091858780 date "2020-07-01" @default.
• W3091858780 modified "2023-09-30" @default.
• W3091858780 title "TYMER: A Yield-based Performance Model for Timing-speculation SRAM" @default.
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• W3091858780 doi "https://doi.org/10.1109/dac18072.2020.9218623" @default.
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