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• W3092505510 endingPage "20200297" @default.
• W3092505510 startingPage "20200297" @default.
• W3092505510 abstract "A self-clocked binary-searching (SCBS) digital low-dropout (DLDO) regulator with fast transient response is proposed. The SCBS controller employed in the DLDO achieves fast transient response and eliminates the need for an external high-speed clock. A transient enhancement unit (TEU) is proposed to reduce the undershoot of the output voltage. The proposed DLDO is simulated in a 40-nm CMOS process with an active area of 0.015 mm2. The simulation results show that with a 15.5mA/2ns load step, it shows a setting time of 28 ns with a voltage undershoot of 93 mV, and it achieves a peak current efficiency of 99.87% by consuming a 19.4-µA quiescent current. Thus, the resulting FOM1 is 0.379 ps and FOM2 is 5 ps." @default.
• W3092505510 created "2020-10-15" @default.
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• W3092505510 date "2020-11-10" @default.
• W3092505510 modified "2023-10-18" @default.
• W3092505510 title "A self-clocked binary-seaching digital low-dropout regulator with fast transient response" @default.
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• W3092505510 doi "https://doi.org/10.1587/elex.17.20200297" @default.
• W3092505510 hasPublicationYear "2020" @default.
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