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• W3100202380 abstract "Stochastic behaviors of resistive random access memory (RRAM) play an important role in the design of cross-point memory arrays. A Monte Carlo (MC) compact model of oxide RRAM is developed and calibrated with experiments on various device stack configurations. With MC SPICE simulations, we show that an increase in array size and interconnect wire resistance will statistically deteriorate write functionality. Write failure probability (WFP) has an exponential dependence on device uniformity and supply voltage (V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>DD</sub> ), and the array bias scheme is a key knob. Lowering array V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>DD</sub> leads to higher effective energy consumption (EEC) due to the increase in WFP when the variation statistics are included in the analysis. Random access simulations indicate that data sparsity statistically benefit write functionality and energy consumption. Finally, we show that a pseudo-subarray topology with uniformly distributed preforming cells in the pristine high-resistance state is able to reduce both WFP and EEC, enabling higher net capacity for memory circuits due to improved variation tolerance." @default.
• W3100202380 created "2020-11-23" @default.
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• W3100202380 date "2017-12-01" @default.
• W3100202380 modified "2023-10-17" @default.
• W3100202380 title "Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays" @default.
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• W3100202380 doi "https://doi.org/10.1109/ted.2017.2766046" @default.
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