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- W3107599232 abstract "The current technologies are moving towards small size, high speed, and cost-effective computing systems. The demand of efficient devices such as operating at high speed and low power is always increasing. Therefore, the work compares various design configuration to check their performance. Adders are the key element of the arithmetic functions such as addition, multiplication, subtraction, and division. Adder has been simulated using spice code to check their functionality. Synopsis HSPICE simulator is used to analyze the circuits for various CMOS technologies. The proposed pseudo domino techniques are proffered to economize power dissipation up to 61% in half adder circuit and 32% in full adder circuit. The 14 transistor based design is economized the power dissipation up to 60% in 1-bit adder circuit." @default.
- W3107599232 created "2020-12-07" @default.
- W3107599232 creator A5010702944 @default.
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- W3107599232 date "2020-11-28" @default.
- W3107599232 modified "2023-10-17" @default.
- W3107599232 title "Comparative Analysis of Adder for Various CMOS Technologies" @default.
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- W3107599232 doi "https://doi.org/10.1007/978-981-15-7394-1_25" @default.
- W3107599232 hasPublicationYear "2020" @default.
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