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- W3137672172 abstract "Placement is one of the most crucial problems in modern Electronic Design Automation (EDA) flows, where the solution quality is mainly dominated by on-chip interconnects. To achieve target closures, designers often perform multiple placement iterations to optimize key metrics such as wirelength and timing, which is highly time-consuming and computationally inefficient. To overcome this issue, in this paper, we present a graph learning-based framework named PL-GNN that provides placement guidance for commercial placers by generating cell clusters based on logical affinity and manually defined attributes of design instances. With the clustering information as a soft placement constraint, commercial tools will strive to place design instances in a common group together during global and detailed placements. Experimental results on commercial multi-core CPU designs demonstrate that our framework improves the default placement flow of Synopsys IC Compiler II (ICC2) by 3.9% in wirelength, 2.8% in power, and 85.7% in performance." @default.
- W3137672172 created "2021-03-29" @default.
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- W3137672172 date "2021-03-21" @default.
- W3137672172 modified "2023-10-02" @default.
- W3137672172 title "The Law of Attraction" @default.
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- W3137672172 doi "https://doi.org/10.1145/3439706.3447045" @default.
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