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- W3140133878 abstract "The search for performance enhancements and cost reductions brought about by greater integration results in large numbers of board level designs being integrated onto a single piece of silicon. One area of interest centres on integrating analogue blocks into a predominately digital device. Over the years, a large amount of effort has been spent automating the design flow for digital devices. This has resulted in large improvements in efficiency, gained at the price of greater levels of abstraction and reliance on specific files for the process to operate correctly. The main challenge when integrating analogue blocks into a digital device is the generation of the required data to allow this integration to be performed correctly and efficiently. This is especially difficult when some of the files do not readily accommodate analogue behaviour. These files include physical views for place and route, functional views for system level simulations and timing format files for synthesis, clock tree insertion and timing closure. Any analogue block must also be included when design for test is performed. (6 pages)" @default.
- W3140133878 created "2021-04-13" @default.
- W3140133878 creator A5042868288 @default.
- W3140133878 date "2000-01-01" @default.
- W3140133878 modified "2023-09-26" @default.
- W3140133878 title "Putting the small 'a' in digital" @default.
- W3140133878 doi "https://doi.org/10.1049/ic:20000519" @default.
- W3140133878 hasPublicationYear "2000" @default.
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