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- W3159537584 abstract "In this article, an L-shaped tunnel field-effect transistor (LTFET)-based one-transistor dynamic random access memory (1T DRAM) with SiGe storage region was demonstrated through 2-D TCAD simulations. The SiGe storage is utilized to boost not only the sense margin (SM) but also the retention time (RT) in comparison to the previously published TFET-based 1T DRAMs. The simulation results reveal that the LTFET 1T DRAM acquired the SM of 6.2 μA/μm with RT of 1.7 s when 50-nm gate length was adopted at 27 °C, whereas at 85 °C, the LTFET 1T DRAM attains the SM and RT of 5.1 μA/μm and 290 ms, respectively. Furthermore, the LTFET 1T DRAM still attains the RT of 1.3 s at 27 °C when the gate length is scaled down to 20 nm. Thus, LTFET 1T DRAM exhibits a better gate length scalability in comparison to the counterpart TFET-based 1T DRAMs. In addition, we observed that the impact of ion irradiation on the proposed cell exhibits almost the same SM before and after the ion strike." @default.
- W3159537584 created "2021-05-10" @default.
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- W3159537584 date "2021-06-01" @default.
- W3159537584 modified "2023-09-26" @default.
- W3159537584 title "L-Shaped Tunnel Field-Effect Transistor-Based 1T DRAM With Improved Read Current Ratio, Retention Time, and Sense Margin" @default.
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- W3159537584 doi "https://doi.org/10.1109/ted.2021.3074348" @default.
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