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- W3161347921 abstract "The adaptation of the Internet-of-Things (IoT) for consumer electronics has enabled us to uplift everyday life. Low-power smart and secure computing devices are needed to sustain the expected growth of consumer IoT. Adiabatic switching is a modern approach that recycles the energy stored in load capacitance to save energy. Further, the cryptographic circuit designed using adiabatic switching is secure against the Correlation Power Analysis (CPA) attack in contrast to the same circuit designed using standard CMOS. In this paper, we propose 2-SPGAL, a 2-phase sinusoidal signal based clocking implementation of Symmetric Pass Gate Adiabatic Logic (SPGAL). As a case study, we simulated the design of PRESENT-80 (a lightweight cryptographic scheme) one round with an in-built Power Clock Generator (PCG) with 45nm technology. The 2-SPGAL shows on an average 82.76% and 67.35% better energy saving compared to standard CMOS, and 2-EE-SPFAL (another 2-phase adiabatic logic), respectively at a frequency range from 100 kHz to 25 MHz with a load of 1 fF. The 2-SPGAL has 16.78% savings of the number of transistors compared to 2-EE-SPFAL for implementation of one round PRESENT-80. Further, the CPA attacks reveal the key in standard CMOS, however, 2-SPGAL PRESENT-80 adiabatic logic design was successful to protect the key." @default.
- W3161347921 created "2021-05-24" @default.
- W3161347921 creator A5051343265 @default.
- W3161347921 creator A5091267392 @default.
- W3161347921 date "2021-01-10" @default.
- W3161347921 modified "2023-09-24" @default.
- W3161347921 title "2-SPGAL: 2-Phase Symmetric Pass Gate Adiabatic Logic for Energy-Efficient Secure Consumer IoT" @default.
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- W3161347921 doi "https://doi.org/10.1109/icce50685.2021.9427720" @default.
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