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• W3178571823 abstract "We report a dual gate (DG), low-temperature polysilicon (LTPS) thin-film transistor (TFT) using blue laser annealing (BLA) of amorphous silicon. The DG TFTs with variable bottom gate lengths (L <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>BG</sub> ) from 2 to 8 μm and a fixed top gate length (L <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TG</sub> ) of 6 μm are investigated. The drain currents of the DG LTPS TFT with L <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>BG</sub> > L <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TG</sub> by 2 μm under DG sweep (DS) are ~4.3 times those of the single gate TFT. The high carrier concentrations (~10 <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>19</sup> cm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>-3</sup> ) at both interfaces (top gate insulator (GI)/poly-Si and poly-Si/bottom GI) under DS is confirmed by technology computer-aided design (TCAD) simulation, which might lead to high drain currents. The poly-Si layer exhibits no grain boundary protrusion from the transmission electron microscopy (TEM) cross-sectional micrograph and thus induces a strong bulk accumulation effect under DS. The fabricated DG TFT-based ring oscillator (RO) and shift register (SR) exhibit an excellent oscillation frequency of 15.8 MHz, fast-rising and falling time of 370 and 366 ns at a driving voltage of -10 V, respectively." @default.
• W3178571823 created "2021-07-19" @default.
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• W3178571823 date "2021-08-01" @default.
• W3178571823 modified "2023-10-16" @default.
• W3178571823 title "High Performance Dual Gate Blue Laser Annealed Poly-Si Thin-Film Transistor for High-Resolution Displays" @default.
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• W3178571823 doi "https://doi.org/10.1109/ted.2021.3091965" @default.
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