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• W3200505855 abstract "Recently, several approaches with the ability to reject the DC-offset in phase locked loop (PLL) methods have been developed. These approaches include different filtering structures which can be classified into two categories: prefiltering before the PLL input and in-loop filtering in the PLL control loop. As highlighted in the literature, the DC-offset rejection methods based on in-loop filtering have received less attention due to their slow dynamic performance. Therefore, this paper proposes an alternative DC-offset rejection technique as in-loop filtering of the PLL. The effectiveness of the proposed PLL is confirmed by simulation and experimental results." @default.
• W3200505855 created "2021-09-27" @default.
• W3200505855 creator A5018278296 @default.
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• W3200505855 date "2021-09-23" @default.
• W3200505855 modified "2023-09-23" @default.
• W3200505855 title "An Effective Solution to Eliminate DC-Offset for Extracting the Phase and Frequency of Grid Voltage" @default.
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• W3200505855 doi "https://doi.org/10.1155/2021/9742683" @default.
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