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• W3204359706 abstract "With superb device characteristics, gallium nitride (GaN) power transistors facilitate fast and efficient power conversion and delivery in modern power circuits. To take full advantage of these devices, high switching frequency ( <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$f_{mathrm {SW}}$ </tex-math></inline-formula> ) operation is highly desirable. However, the lack of GaN compatible high-speed, efficient, and reliable gate drivers has been a formidable design hindrance. In this article, we address three critical design challenges faced in GaN power gate driving, namely bootstrap (BST) level-shifting, switching slew rate (SR) control, and active deadtime <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{mathrm {dead}}$ </tex-math></inline-formula> control. We first propose a BST dynamic level-shifting technique to enable sub-nanosecond <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{mathrm {delay}}$ </tex-math></inline-formula> at high <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$f_{mathrm {SW}}$ </tex-math></inline-formula> . Meanwhile, a dual-SR switching technique is introduced to retain both low switching power and noise. Compared with traditional constant <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{mathrm {dead}}$ </tex-math></inline-formula> controls, the <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{mathrm {dead}}s$ </tex-math></inline-formula> in this design are regulated actively for high efficiency. To validate these techniques, a four-phase GaN-based switching power converter was designed and implemented on a <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$0.35~mu text{m}$ </tex-math></inline-formula> high-voltage (HV) BCD process. At a <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$f_{mathrm {SW}}$ </tex-math></inline-formula> of 20 MHz and a <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$V_{mathrm {IN}}$ </tex-math></inline-formula> of 20 V, it delivers a maximum power of 8.4 W and a peak efficiency of 84.9%. The gate drivers are fully integrated including all BST capacitors and active BST switches. It achieves regulated rise and fall <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{mathrm {dead}}s$ </tex-math></inline-formula> of 3.2 and 4.7 ns, respectively, for a load range from 50 mA to 1.2 A. The gate switching rise time <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$t_{R}$ </tex-math></inline-formula> is reduced to 1 ns with a maximum switching SR of 48 V/ns. The converter employs a HV synchronized hysteretic control, which works with the proposed gate drivers seamlessly to demonstrate a dynamic voltage scaling (DVS) <italic xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>Vo</i> up- and down-tracking speeds of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$0.33~mu text{s}$ </tex-math></inline-formula> /V and <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$0.47~mu text{s}$ </tex-math></inline-formula> /V, respectively." @default.
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• W3204359706 date "2022-03-01" @default.
• W3204359706 modified "2023-10-17" @default.
• W3204359706 title "On-Chip HV Bootstrap Gate Driving for GaN Compatible Power Circuits Operating Above 10 MHz" @default.
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• W3204359706 doi "https://doi.org/10.1109/jssc.2021.3112507" @default.
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