Matches in SemOpenAlex for { <https://semopenalex.org/work/W3205571036> ?p ?o ?g. }
- W3205571036 endingPage "1664" @default.
- W3205571036 startingPage "1664" @default.
- W3205571036 abstract "With the continuous miniaturization of electronic devices and the upcoming new technologies such as Artificial Intelligence (AI), Internet of Things (IoT), fifth-generation cellular networks (5G), etc., the electronics industry is achieving high-speed, high-performance, and high-density electronic packaging. Three-dimensional (3D) Si-chip stacking using through-Si-via (TSV) and solder bumping processes are the key interconnection technologies that satisfy the former requirements and receive the most attention from the electronic industries. This review mainly includes two directions to get a precise understanding, such as the TSV filling and solder bumping, and explores their reliability aspects. TSV filling addresses the DRIE (deep reactive ion etching) process, including the coating of functional layers on the TSV wall such as an insulating layer, adhesion layer, and seed layer, and TSV filling with molten solder. Solder bumping processes such as electroplating, solder ball bumping, paste printing, and solder injection on a Cu pillar are discussed. In the reliability part for TSV and solder bumping, the fabrication defects, internal stresses, intermetallic compounds, and shear strength are reviewed. These studies aimed to achieve a robust 3D integration technology effectively for future high-density electronics packaging." @default.
- W3205571036 created "2021-10-25" @default.
- W3205571036 creator A5007458581 @default.
- W3205571036 creator A5014143018 @default.
- W3205571036 creator A5028668147 @default.
- W3205571036 creator A5055717238 @default.
- W3205571036 creator A5076516778 @default.
- W3205571036 date "2021-10-19" @default.
- W3205571036 modified "2023-09-30" @default.
- W3205571036 title "A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process" @default.
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