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- W3206073179 abstract "Eight level resistance switching in a tri-layer ReRAM cell (ZrOx/AlOx/HfOx) of fixed stack thickness was obtained by tuning the spatial location of its intermediate AlOx layer hence by varying its spatial distribution of three dielectrics. Here we have investigated the underlying reason behind the observed well separated low power resistance switching in this type of valance change memory (VCM) cell achieved by varying its SET current compliance and discussed stack design aspect which impacts its characteristics. Electrical characteristics of a favorable cell obtained by our scheme demonstrate non-overlapped and retainable resistance levels even followed by dc endurance cycles. 106 SET/RESET cycle-based ac-endurance measurement was furthermore performed to assess resistance margin between the HRS and the LRS, and favorable cell exhibited well behaved cell-to-cell and cycle-to-cycle variabilities of its resistance states. Furthermore, retention measurements conducted at room temperature and at 85∘C demonstrate stable non-overlapped resistance levels as suitable for the multi-level/cell storage. SET bias scaling of the favorable cell has been finally assessed by numerical simulation." @default.
- W3206073179 created "2021-10-25" @default.
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- W3206073179 date "2021-01-01" @default.
- W3206073179 modified "2023-09-24" @default.
- W3206073179 title "Eight-Level/Cell Storage by Tuning the Spatial Distribution of Dielectrics in a Tri-layer ReRAM Cell: Electrical Characteristics and Reliability" @default.
- W3206073179 doi "https://doi.org/10.1109/tdmr.2021.3120966" @default.
- W3206073179 hasPublicationYear "2021" @default.
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