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- W3215194920 abstract "This paper presents a charge-redistribution inmemory-computing (IMC) macro that realizes multi-bit multiply-and-accumulation (MAC) operation based on 5T static random-access memory (SRAM). The charge-domain MAC operation based on capacitor array allows the IMC-SRAM macro to achieve high linearity and improved energy efficiency. Also, an optimized 5T SRAM structure saves area consumption, increasing bit density of the macro. The proposed IMC-SRAM 64 × 64 macro was designed using 28nm CMOS process." @default.
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- W3215194920 date "2021-10-06" @default.
- W3215194920 modified "2023-09-29" @default.
- W3215194920 title "A Multi-Bit In-Memory-Computing SRAM Macro Using Column-Wise Charge Redistribution for DNN Inference in Edge Computing Devices" @default.
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- W3215194920 doi "https://doi.org/10.1109/isocc53507.2021.9613934" @default.
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