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- W37500363 abstract "At certain times during the operation of a system, events within the system require the execution of software outside the explicit flow of control. When such an exceptional event occurs, an Alpha AXP processor forces a change in control flow from that indicated by the current instruction stream. The notification process for such events is an exception, an interrupt, or a machine check. This chapter describes the three events in detail. When the processor encounters an exception, it traps to the PALcode that provides preliminary exception dispatch for the operating system. PALcode provides a simple and efficient method of dispatching to the operating system for those exceptions that require operating system action. It also classifies each exception into one of the following categories: (1) memory management exceptions, (2) system service call exceptions, (3) general exceptions, and (4) panic exceptions. PALcode supports two software interrupt levels and an implementation-specific limit of hardware interrupt sources. The Windows NT AXP PALcode supports eight levels of interrupt priority known as interrupt request levels (IRQL). The supported IRQLs are numbered 0-7. The platform independence of interrupt dispatch is accomplished via three tables: (1) interrupt level table, (2) interrupt mask table, and (3) interrupt dispatch table. Machine checks are initiated when the hardware detects a hardware error condition. PALcode recognizes the following types of machine checks: (1) correctable errors, (2) uncorrectable errors, and (3) catastrophic errors." @default.
- W37500363 created "2016-06-24" @default.
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- W37500363 date "1995-01-01" @default.
- W37500363 modified "2023-09-27" @default.
- W37500363 title "Exceptions, Interrupts, and Machine Checks (II–C)" @default.
- W37500363 doi "https://doi.org/10.1016/b978-1-4831-8403-6.50031-8" @default.
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