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- W4200445972 abstract "The proposed spread-spectrum clock generator (SSCG) was to improve the jitter signal integrity of eye diagram from the experimental result was compared on system on chip (SOC). The proposed fully integrated circuit consists of continuous-time low-pass sigma delta (Σ-Δ) analog to digital converter (ADC), voltage control oscillator (VCO), current-reused LC injection locked frequency divider by 8 (ILFD ÷8) as linear mixers and Gm-C loop filter. Ultimately, this design successfully reduced radio frequency interference (RFI) with a smaller spreading ratio as compared with existing design to achieve optimal signal integrity and implemented in Bio-systems of control wireless systems." @default.
- W4200445972 created "2021-12-31" @default.
- W4200445972 creator A5083357230 @default.
- W4200445972 date "2021-10-12" @default.
- W4200445972 modified "2023-10-18" @default.
- W4200445972 title "Continuous-Time Low-Pass Sigma Delta with Voltage-Controlled Oscillator and Noise Divider of Spread Spectrum Clock Generator for Bio-System Applications" @default.
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- W4200445972 doi "https://doi.org/10.23919/iccas52745.2021.9649933" @default.
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