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• W4206094072 endingPage "1174" @default.
• W4206094072 startingPage "1162" @default.
• W4206094072 abstract "Different from the conventional two-point modulation (TPM) type-II phase-locked loops (PLLs) requiring non-trivial gain calibrations and TPM type-III PLLs with loop stability concern and limited chirp rate, a self-adapting gain mismatch TPM type-II digital PLL is proposed in this article. It directly detects frequency error as its input signal, allowing frequency ramp tracking with zero steady-state frequency error using a type-II PLL. In addition, the maximum trackable slope in the case of the proposed TPM type-II PLL is intrinsically larger than that of the conventional TPM type-III PLL. A polarity navigator is embedded in the digital loop filter to improve the linearity at the chirp turning-around points (TAPs). Fabricated in a 28-nm complementary metal–oxide–semiconductor (CMOS) technology, the proposed PLL consumes 23 mW from a 1-V power supply and occupies 0.31 mm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> . The measurement results indicate that the proposed PLL can generate a precise triangular chirp with 2.27-GHz bandwidth (BW) and 18.2- <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$mu text{s}$ </tex-math></inline-formula> period at 12.5 GHz. To the best knowledge of the authors, this work demonstrates the widest normalized Chirp-bandwidth and the fastest chirp rate simultaneously." @default.
• W4206094072 created "2022-01-26" @default.
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• W4206094072 date "2022-04-01" @default.
• W4206094072 modified "2023-10-06" @default.
• W4206094072 title "A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation" @default.
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• W4206094072 doi "https://doi.org/10.1109/jssc.2021.3129900" @default.
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