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• W4210588783 abstract "The growth of Neural Networks (NNs) and Machine Learning (ML) usage has rapidly increased over the last decade. Traditional dynamic random-access memory (DRAM) is struggling to meet the computational, throughput demands of these NNs and has become a bottleneck in the system. One of the commonly proposed solutions is Near-Memory Computation (NMC) hardware accelerators to move the computation closer to the data resulting in improved throughput and reduced power consumption. In this paper, we analyze a few critical NMC architecture implementations, specifically those with 3D-Stacked DRAM memory. We have organized a literature review across structures, configuration, application, performance metrics, and present challenges and opportunities." @default.
• W4210588783 created "2022-02-08" @default.
• W4210588783 creator A5048806501 @default.
• W4210588783 creator A5074605796 @default.
• W4210588783 date "2021-10-01" @default.
• W4210588783 modified "2023-10-14" @default.
• W4210588783 title "A Review of 3D-Dynamic Random-Access Memory based Near-Memory Computation" @default.
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• W4210588783 doi "https://doi.org/10.1109/3dic52383.2021.9687615" @default.
• W4210588783 hasPublicationYear "2021" @default.
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