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• W4210960818 abstract "Information flow analysis plays an important role in hardware security verification as it enables reasoning about properties related to confidentiality, integrity, and availability. This book chapter describes techniques for integrating information flow tracking into the high-level synthesis (HLS) design flow. Specifically, we develop precise information flow tracking methods that target the HLS backend and verify the security of HLS design outputs. We discuss the benefits of performing information flow tracking at the register transfer level, present fine-granularity information flow model formalizations in a common hardware description language, and illustrate how hardware security properties are formally verified using standard EDA verification tools. We present experimental results to show the effectiveness of our secure hardware design flow in proving security properties related to confidentiality, integrity, isolation, constant time, and malicious design modification. This provides a promising approach for enhancing the traditional functional HLS design flow to consider security as an additional design constraint." @default.
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• W4210960818 date "2021-05-28" @default.
• W4210960818 modified "2023-10-16" @default.
• W4210960818 title "Integrating Information Flow Tracking into High-Level Synthesis Design Flow" @default.
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• W4210960818 doi "https://doi.org/10.1007/978-3-030-78841-4_16" @default.
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