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- W4213166502 abstract "We present CAD framework and EDA tool, <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$mathrm{S{scriptstyle O}CC{scriptstyle OM}}$ </tex-math></inline-formula> , for automated synthesis of optimized SoC architectures. We delineate a disciplined and streamlined methodology to enable automated IP integration and design optimization. <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$mathrm{S{scriptstyle O}CC{scriptstyle OM}}$ </tex-math></inline-formula> supports generation of a wide variety of optimized SoCs by: 1) automating the entire process of intellectual property (IP) standardization and integration; 2) allowing configurable assembly of complex, scalable systems with application-specific subsystems; and 3) enabling optimization and evaluation of generated designs based on area and power constraints. Applications of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$mathrm{S{scriptstyle O}CC{scriptstyle OM}}$ </tex-math></inline-formula> include development of heterogeneous, domain-specific SoCs, rapid register-transfer level (RTL) prototyping of wide-varieties of SoC benchmarks, and many others." @default.
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- W4213166502 date "2022-04-01" @default.
- W4213166502 modified "2023-10-16" @default.
- W4213166502 title "SoCCom: Automated Synthesis of System-on-Chip Architectures" @default.
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- W4213166502 doi "https://doi.org/10.1109/tvlsi.2022.3141326" @default.
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