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- W4214523326 abstract "This paper presents a novel all-digital background calibration technique for general Time-Interleaved Analog-to-Digital Converters (TIADCs). Calibration of gain and timing mismatch of TIADCs using the estimation technique is designed based on the principle of the Adaptive Noise Canceller (ANC). In this ANC, there are two stages in gain, timing mismatch estimation in which a cascade structure of the correction and estimation is proposed to guarantee that our calibration achieves high performance. Besides the first Nyquit zone, the input signal at different Nyquist zones is also experimented. It is shown through the result that our calibration performs excellently on all chosen Nyquist zones. It achieves the SNDR (Signal to Noise Ratio) and SFDR (Spurious Free Dynamic Range) improvement of 19dB and 49dB, respectively. Moreover, the synthesized design with hardware co-simulation carried on the Xilinx Kintex-7 field-programmable gate array (FPGA) platform consumes only 7.36 % of the hardware resources of the FPGA chip and reduces the mismatch tone level to -87 dB. In addition, our convergence speed of SNDR during calibration is approximately 1/3 others." @default.
- W4214523326 created "2022-03-02" @default.
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- W4214523326 date "2022-02-25" @default.
- W4214523326 modified "2023-09-26" @default.
- W4214523326 title "Calibration of gain and timing mismatch for TI-ADCs with signals in all Nyquist zones using adaptive noise canceller" @default.
- W4214523326 doi "https://doi.org/10.54939/1859-1043.j.mst.77.2022.137-149" @default.
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