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- W4223945649 abstract "Floorplanning is an ever-emerging field in the Very Large Scale Integration (VLSI) circuit design automation since it deals with essential design metrics of a floorplan, such as chip area, total wirelength, and temperature. This paper aims to optimize these design metrics to obtain an optimal floorplan with reduced computation time. A Skewed B* (SKB) tree based Enhanced Memetic Algorithm (EMA) is proposed for temperature-driven fixed-outline non-sliceable floorplanning. The proposed EMA has two search phases: a global search based on Genetic Algorithm (GA), and a local search based on the Adaptive Fast Simulated Annealing (AFSA) algorithm. A novel dynamic threshold bias search strategy is implemented to balance the search phases, thus increasing the convergence speed to obtain an optimal solution. The performance of the proposed algorithm is tested on MCNC (Microelectronic Centre for North Carolina), and GSRC (Gigascale System Research Centre) state-of-the-art benchmark circuits. Experimental results show that the EMA produces highly optimal design metrics on all tested benchmark circuits." @default.
- W4223945649 created "2022-04-19" @default.
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- W4223945649 date "2022-09-01" @default.
- W4223945649 modified "2023-09-29" @default.
- W4223945649 title "An Enhanced Memetic Algorithm using SKB tree representation for fixed-outline and temperature driven non-slicing floorplanning" @default.
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- W4223945649 doi "https://doi.org/10.1016/j.vlsi.2022.04.001" @default.
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