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- W4224257816 abstract "Network-on-Chip is responsible for on-chip communication in multi-core and many-core processors. A Network-on-chip is composed of several routers and channels, each router working on behalf of a processor core or main memory. Buffers, switches, arbiters and allocators are some of the components inside the router of an on-chip network. Along with latency and throughput, power consumed by the interconnection network is a crucial factor to estimate the performance of a processor. In this paper we present a review of power consumption of Network-on-Chip router and its internal components. The majority of the power consumed by a Network-on-Chip router is consumed by the buffers." @default.
- W4224257816 created "2022-04-26" @default.
- W4224257816 creator A5034253596 @default.
- W4224257816 date "2022-02-11" @default.
- W4224257816 modified "2023-10-16" @default.
- W4224257816 title "Estimation of Power Consumption in a Network-on-Chip Router" @default.
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- W4224257816 doi "https://doi.org/10.1109/delcon54057.2022.9753477" @default.
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